345 lines
12 KiB
C
345 lines
12 KiB
C
/*
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* Copyright (c) CompanyNameMagicTag 2021-2021. All rights reserved.
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* Description: dfx_sys dsid.
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* Author: CompanyName
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* Create: 2021-1-27
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*/
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#ifndef __DFX_SYS_DSID_H__
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#define __DFX_SYS_DSID_H__
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#define EXT_DSID_MIN 0xA000
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#define EXT_DSID_MAX 0xF000
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#define EXT_STAT_ID_NUM_MAX (EXT_DSID_MAX - EXT_DFX_STAT_ID_BASE_SYS)
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/* ************************************************ */
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/* SAL statistic definition */
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/* ************************************************ */
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/* range [A000, A050) */
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/* ************************************************ */
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/* ************************************************ */
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/* DRV statistic definition */
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/* ************************************************ */
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/* range [0xA050, 0xA150) */
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/* ************************************************ */
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#define EXT_DSID_DRV_XXX 0xA050 /* EXT_DSID_DRV_XXX_S */
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#define EXT_DSID_DRV_FLASH_INFO 0xA051 /* FLASH Statistics */
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#define EXT_DSID_DRV_UART0_INFO 0xA052 /* UART0 statistics */
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#define EXT_DSID_DRV_UART1_INFO 0xA053 /* UART1 Statistics */
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#define EXT_DSID_DRV_SPI_INFO 0xA054 /* SPI Statistics */
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#define EXT_DSID_DRV_IR_INFO 0xA055 /* IR statistics */
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#define EXT_DSID_DRV_HRT_INFO 0xA057 /* HRT Statistics */
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#define EXT_DSID_DRV_ETH_INFO 0xA058 /* ETH Statistics */
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#define EXT_DSID_DRV_RF_ERR 0xA059 /* RF GPIO SPI Statistics */
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/* Structure definition */
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typedef struct {
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ext_obj64 obj_cnt;
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} ext_dsid_drv_xxx;
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typedef struct sfc_op {
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td_u8 uciftype;
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td_u8 uccmd;
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td_u8 ucdummy;
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td_u8 pad;
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td_u32 ulsize;
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td_u32 ulclock;
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} sfc_operation;
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typedef struct sfc_dfx_info {
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td_u32 pname;
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td_u32 ulchipselect;
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td_u32 ulchipsize;
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td_u32 ulerasesize;
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td_u32 piobase;
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td_u32 uladdrcycle;
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sfc_operation read[1];
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sfc_operation write[1];
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sfc_operation erase[8]; /* 8 count */
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} ext_dsid_drv_flash_info;
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typedef struct {
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td_u32 read;
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td_u32 write;
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td_u32 int_read;
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td_u32 int_write;
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td_u32 err_overrun;
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td_u32 err_parity;
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td_u32 err_frame;
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td_u32 err_break;
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td_u32 err_busy;
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td_u32 tx_time_us; /* system time value when sending */
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td_u32 tx_timer_us; /* Set value of the timer when sending */
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td_u32 tx2rx_max_us; /* The longest time to send and receive */
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td_u32 tx2rx_max_us_timestamp; /* Sending the longest transmission time */
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} ext_dsid_drv_uart_info;
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typedef struct {
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td_u32 old_addr; /* dbk preemption: preempted ip address */
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td_u32 new_addr; /* dbk preemption: preempt ip address */
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td_u32 second; /* dbk preemption: time (s) */
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} ext_dsid_sal_dbk_grab_connect_info;
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#define EXT_DSID_SAL_DBK_GRAB_CONNECT_INFO_COUNT 3
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typedef struct spi_init_info {
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td_u32 baudrate; /* baud rate */
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td_u32 framemode; /* transfer mode */
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td_u32 datawidth; /* data width */
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td_u32 spo; /* spiclkout phase in moto's spi mode */
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td_u32 sph; /* spiclkout polarity in moto's spi mode */
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} ext_spi_dev_attr;
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typedef struct spi_dfx_info {
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td_u32 id;
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td_u32 int_vector;
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ext_spi_dev_attr spi_attr;
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td_u32 buf_size;
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td_u32 reg_base;
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td_u32 rxbuf_p;
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td_u32 rxbuf_read;
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td_u32 rxbuf_write;
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td_s32 rxbuf_status;
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td_u32 txbuf;
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td_u32 txbuf_read;
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td_u32 txbuf_write;
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td_s32 txbuf_status;
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td_u32 err_buf_full;
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td_u32 err_runout;
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} ext_dsid_drv_spi_info;
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typedef struct {
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ext_obj64 obj_cnt;
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td_u32 rx_cnt; /* number of received packets */
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td_u32 tx_cnt; /* number of packets sent */
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td_u32 tx_err_cnt; /* send failure count */
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td_u16 buf_total; /* total number of buffer */
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td_u16 buf_used; /* current number of uses */
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} ext_dsid_drv_eth_info;
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typedef struct {
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ext_obj64 obj_cnt;
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td_u32 timer_add_cnt; /* add the number of timer */
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td_u32 timer_del_cnt; /* delete the number of timer */
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td_u32 timer_timeout_cnt; /* number of teimrs due */
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} ext_dsid_drv_hrt_info;
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/* ************************************************ ***************************** */
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/* MAC statistic definition */
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/* ************************************************ ***************************** */
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/* range [A250, A450) */
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/* 1, networking service message [0xA250~0xA270) */
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/* 2, route [0xA270~0xA290) */
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/* 3, sender [0xA290~0xA2B0) */
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/* 4, segmenter [0xA2B0~0xA2D0) */
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/* 5, PHY [0xA2D0~0xA2F0) */
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/* 6, reorganizer [0xA2F0~0xA310) */
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/* 7, beacon [0xA310~0xA330) */
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/* 8, conv [0xA330~0xA350) */
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/* 9, RX [0xA350~0xA370) */
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/* 10, NTB [0xA370~0xA390) */
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/* 11, the copy control [0xA390~0xA3A0) */
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/* 12, secondary development of the control unit [0xA3A0~0xA3B0) */
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/* 13, DFX [0xA3B0~0xA3C0) */
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/* 14, PLC_IP [0xA3C0~0xA3D0) */
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/* 17 Reserved [0xA3D0~0xA450) */
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/* ************************************************ ***************************** */
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/* ************************************************ ***************************** */
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/* Note that the definition of the ID number must be defined in accordance with the documentation requirements. */
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/* ID: EXT_DSID_XXX_XXX */
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/* Corresponding structure: EXT_DSID_XXX_XXX_S */
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/* ************************************************ ***************************** */
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/* PHY statistic definition */
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#define EXT_DSID_PHY_OFFSET 0xA2D0
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#define EXT_DSID_PHY_TX_ERR_ID (EXT_DSID_PHY_OFFSET + 0x00)
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/* Structure definition */
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/* The measurable count variable inside L1COMMON */
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typedef struct {
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ext_obj64 obj_cnt;
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td_u32 nv_id_error;
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td_u32 afe_error;
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td_u32 nv_read_error;
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td_u32 get_hw_id_error; /* get the number of hardware id failures */
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td_u32 power_step_error; /* configure the number of digital transmit power errors */
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td_u32 last_hw_id; /* hardware id obtained last time */
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td_u16 malloc_err_cnt; /* memory analysis failure count */
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td_u16 pad1;
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} ext_dsid_phy_l1_common_err;
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/* The measurable variable inside TX */
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typedef struct {
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td_u32 freq_err_cnt; /* band number error count */
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td_u32 freq_same_cnt; /* parallel detection frequency band consistent, number of unswitched */
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td_u32 freq_change_cnt; /* band switching times */
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td_u8 cur_freq;
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td_bool is_in_silence; /* the sender is in a silent state */
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td_u16 set_freq_in_sending_cnt; /* set the frequency band during transmission */
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td_u32 plc_tx_not_allow_cnt; /* the number of times plc is not allowed to be sent */
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td_u32 plc_tx_success_cnt;
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td_u32 spc_tx_success_cnt;
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td_u32 plc_tx_timer_success_cnt;
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} ext_dsid_phy_tx_err;
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/* ticker module statistics */
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#define NDM_STATISTIC_HEAD_OFFSET 0xA390
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#define EXT_DSID_MAC_NDM_STAT_INFO_ID (NDM_STATISTIC_HEAD_OFFSET + 0x02) /* Error information for the controller */
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#define EXT_DSID_MAC_NDM_REMOTE_INFO_ID (NDM_STATISTIC_HEAD_OFFSET + 0x03) /* remote channel information */
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/* dfx module statistics */
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#define DFX_STATISTIC_HEAD_OFFSET 0xA3B0
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#define EXT_DSID_MAC_DFX_STAT_INFO_ID (DFX_STATISTIC_HEAD_OFFSET + 0x01) /* dfx module business process statistics */
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/* Business statistics of the controller */
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typedef struct {
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td_u16 tx_chl_type_proxy_path_cnt;
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td_u16 tx_chl_type_no_proxy_path_cnt;
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td_u16 tx_chl_type_unkown_cnt;
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td_u16 rx_chl_type_proxy_path_cnt;
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td_u16 rx_chl_type_no_proxy_path_cnt;
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td_u16 rx_chl_duplicate_pk_cnt; /* received duplicate messages */
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td_u16 rx_chl_type_unkown_cnt;
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td_u16 mac_send_message_unknown_id; /* unknown id */
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td_u16 tx_remote_req_success_cnt; /* number of remote requests sent */
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td_u16 tx_remote_req_fail_cnt; /* number of remote requests sent */
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td_u16 pad;
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td_u16 rx_remote_rsp_cnt; /* number of remote responses received */
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td_u16 dbk_remote_req_cnt; /* number of remote requests sent by dbk */
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td_u16 dbk_remote_rsp_cnt; /* number of remote responses received by dbk */
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td_u16 dbk_cmd_callback_ndm_notify_msg_fail_cnt;
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td_u16 dbk_cmd_callback_para_err_cnt;
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td_u16 dbk_cmd_callback_impl_cnt;
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td_u16 dbk_cmd_callback_impl_mac_buffer_fail_cnt;
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td_u16 dbk_cmd_callback_impl_packet_frame_fail_cnt;
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td_u16 mac_send_message_set_white_list_cnt;
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td_u16 mac_send_message_cnt;
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td_u16 mac_send_message_msg_fail_cnt;
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td_u16 mac_send_message_msg_unknown_cnt;
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td_u16 nv_changed_notify_cnt; /* nv refresh callbacks */
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/* 14 */
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td_u32 rx_remote_chl_pkt_cnt;
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td_u32 drop_remote_chl_pkt_cnt;
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td_u32 local_handle_remote_chl_pkt_cnt;
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td_u16 retrans_pkt_from_req_success_cnt;
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td_u16 retrans_pkt_from_req_fail_cnt;
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td_u16 retrans_pkt_from_rsp_success_cnt;
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td_u16 retrans_pkt_from_rsp_fail_cnt;
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/* create the number of copy controller channel connection request packets */
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td_u32 create_remote_connect_req_cnt;
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/* create the number of copy control channel connection response messages */
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td_u32 create_remote_connect_rsp_cnt;
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td_u32 create_remote_heartbeat_cnt; /* create the number of heartbeat packets for the tracker channel */
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td_u32 rcv_remote_connect_req_cnt; /* receive the number of caller channel connection request packets */
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/* receive the number of copy control channel connection response messages */
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td_u32 rcv_remote_connect_rsp_cnt;
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/* receive the number of heartbeat packets from the remote control channel */
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td_u32 rcv_remote_heartbeat_cnt;
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td_u32 create_chl_long_head_pkt_cnt;
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} ext_dsid_mac_ndm_stat_info;
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/* The statistics of the remote channel of the remote controller */
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typedef struct {
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td_u32 fragment_output_success_cnt;
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td_u32 fragment_output_fail_cnt;
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td_u32 pipe_fragment_output_cnt;
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td_u32 pipe_fragment_output_malloc_fail_cnt;
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td_u32 pipe_fragment_output_msg_fail_cnt;
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td_u32 pipe_output_cnt;
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td_u32 pipe_output_mac_buffer_fail_cnt;
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td_u32 pipe_output_success_cnt;
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td_u32 pipe_output_fail_cnt;
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td_u32 pk_parse_transf_target_addr_fail_cnt;
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td_u32 pk_dump_pk_to_cvg_success_cnt;
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td_u32 dump_pk_to_cvg_fail_cnt;
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td_u32 put_pkt_in_tl_success_cnt;
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td_u32 put_pkt_in_tl_fail_cnt;
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td_u32 tl_pkt_bad_data_cnt;
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td_u32 rcv_chl_tl_pkt_cnt;
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td_u32 not_my_chl_tl_pkt_cnt;
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td_u32 handle_rcv_tl_pkt_fail_cnt;
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td_u32 rsb_tl_pkt_success_cnt;
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td_u16 cmd_id;
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td_u16 cmd_id_map[3]; /* 3 is length */
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td_u32 clear_memory_msg_count;
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td_u32 cur_malloc_count;
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td_u32 cur_free_count;
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td_u16 exception_pc_pkt_cnt;
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td_u16 rpt_pkt_to_pc_cnt;
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} ext_dsid_mac_ndm_remote_info;
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/* dfx module process statistics */
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typedef struct {
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td_u32 send_msg_err_cnt;
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td_u16 malloc_err_cnt;
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td_u16 mfree_err_cnt;
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td_u32 query_request_cnt; /* dbk query statistics */
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td_u32 ndc_msg_cnt;
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td_u32 msg_nv_refresh_notify_cnt;
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td_u32 msg_dfx_ctrl_pk_cnt;
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td_u32 msg_dfx_ndm_notify_cnt;
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td_u32 msg_dfx_query_notify_cnt;
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td_u32 ndm_chl_rcv_pkt; /* number of ndm channel packets received from the nms */
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td_u32 msg_unknown_cnt;
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td_u32 topo_success_cnt;
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td_u32 discover_list_success_cnt;
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td_u32 discover_list_sm_success_cnt;
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td_u32 router_table_success_cnt;
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td_u16 other_query_success_cnt;
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td_u16 other_query_fail_cnt;
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td_u16 topo_fail_cnt;
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td_u16 discover_list_fail_cnt;
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td_u16 discover_list_sm_fail_cnt;
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td_u16 router_table_fail_cnt;
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td_u16 phase_identify_success_cnt;
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td_u16 phase_identify_fail_cnt;
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td_u16 violence_sta_qry_success_cnt;
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td_u16 violence_sta_qry_fail_cnt;
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td_u16 all_sta_info_success_cnt;
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td_u16 all_sta_info_fail_cnt;
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td_u16 topo_sm_sta_info_success_cnt;
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td_u16 topo_sm_sta_info_fail_cnt;
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td_u16 topo_sm_ver_info_success_cnt;
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td_u16 topo_sm_ver_info_fail_cnt;
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td_u16 register_cmd_id_success_cnt;
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td_u16 register_cmd_id_fail_cnt;
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td_u16 query_register_cmd_id_success_cnt;
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td_u16 cover_cmd_id_cnt;
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} ext_dsid_mac_dfx_stat_info;
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/* ***************************************************************************** */
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/* UPG statistic definition */
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/* ***************************************************************************** */
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#define EXT_DSID_UPG_CCO_SND_STAT 0xA502 /* ext_dsid_upg_cco_snd_info */
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#define EXT_DSID_UPG_STA_BLK_STAT 0xA503 /* ext_dsid_upg_sta_start_blk */
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#define EXT_DSID_UPG_CCO_RCV_STAT 0xA504 /* ext_dsid_upg_cco_rcv_info */
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#define EXT_DSID_UPG_CCO_NET_STAT 0xA505 /* ext_dsid_upg_network_info */
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#define EXT_DSID_UPG_STA_STOP_STAT 0xA506 /* ext_dsid_upg_sta_status_stop */
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#define EXT_DSID_UPG_STA_REPLY_STAT 0xA508 /* ext_dsid_upg_sta_reply */
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#define EXT_DSID_UPG_CCO_QUERY_INFO 0xA512 /* ext_dsid_upg_cco_query_info */
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#define EXT_DSID_UPG_STA_QUERY_INFO 0xA513 /* ext_dsid_upg_sta_query_info */
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#endif /* __DFX_SYS_DSID_H__ */
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